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  ? semiconductor components industries, llc, 2011 may, 2011 ? rev. 6 1 publication order number: mc74vhc4066/d mc74vhc4066 quad analog switch/ multiplexer/demultiplexer high ? performance silicon ? gate cmos the mc74vhc4066 utilizes silicon ? gate cmos technology to achieve fast propagation delays, low on resistances, and low off ? channel leakage current. this bilateral switch/multiplexer/demultiplexer controls analog and digital voltages that may vary across the full power ? supply range (from v cc to gnd). the vhc4066 is identical in pinout to the metal ? gate cmos mc14066 and the high ? speed cmos hc4066a. each device has four independent switches. the device has been designed so that the on resistances (r on ) are much more linear over input voltage than r on of metal ? gate cmos analog switches. the on/off control inputs are compatible with standard cmos outputs; with pullup resistors, they are compatible with lsttl outputs. for analog switches with voltage ? level translators, see the vhc4316. features ? fast switching and propagation speeds ? high on/off output voltage ratio ? low crosstalk between switches ? diode protection on all inputs/outputs ? wide power ? supply voltage range (v cc ? gnd) = 2.0 to 12.0 volts ? analog input voltage range (v cc ? gnd) = 2.0 to 12.0 volts ? improved linearity and lower on resistance over input voltage than the mc14016 or mc14066 ? low noise ? chip complexity: 44 fets or 11 equivalent gates ? these devices are pb ? free and are rohs compliant pin assignment 11 12 13 14 8 9 10 5 4 3 2 1 7 6 y d x d d on/off control a on/off control v cc x c y c x b y b y a x a gnd c on/off control b on/off control marking diagrams tssop ? 14 dt suffix case 948g 1 soeiaj ? 14 m suffix case 965 soic ? 14 d suffix case 751a 1 1 http://onsemi.com a = assembly location wl, l = wafer lot y = year ww, w = work week g or  = pb ? free package 1 14 vhc4066 alywg vhc4066g awlyww 1 14 vhc 4066 alyw   1 14 (note: microdot may be in either location) function table on/off control state of input analog switch loff hon device package shipping ? ordering information MC74VHC4066DR2G soic ? 14 2500 / t&r mc74vhc4066dtr2g tssop ? 14 2500 / t&r mc74vhc4066mg soeiaj ? 14 ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. 50 / rail
mc74vhc4066 http://onsemi.com 2 x a y a 12 a on/off control 13 x b y b 43 b on/off control 5 x c y c 89 c on/off control 6 x d y d 11 10 d on/off control 12 analog outputs/inputs analog inputs/outputs = x a , x b , x c , x d pin 14 = v cc pin 7 = gnd figure 1. logic diagram ??????????????????????? ??????????????????????? ???? ?????????????? ????? ??? ???? ???? v cc ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 25 ??? ??? ???? ???? ???? ?????????????? ?????????????? ?????????????? ????? ????? ????? ??? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ???  c ???? ???? ?????????????? ?????????????? ????? ????? ??? ???  c *maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the recommended operating conditions. ?derating ? soic package: ? 7 mw/  c from 65  to 125  c tssop package: ? 6.1 mw/  c from 65  to 125  c recommended operating conditions ???? ???? ??????????????? ??????????????? ??? ??? ?? ?? ??? ??? ???? ???? v cc ??????????????? ??????????????? ??? ??? ?? ?? ??? ??? ???? ???? ??????????????? ??????????????? ??? ??? ?? ?? ??? ??? ???? ???? ??????????????? ??????????????? ??? ??? ?? ?? ??? ??? ???? ???? ??????????????? ??????????????? ??? ??? ?? ?? ??? ??? ???? ???? ??????????????? ??????????????? ??? ??? ?? ?? ??? ???  c ???? ???? ???? ???? ???? ???? ??????????????? ??????????????? ??????????????? ??????????????? ??????????????? ??????????????? ??? ??? ??? ??? ??? ??? ?? ?? ?? ?? ?? ?? ??? ??? ??? ??? ??? ??? ? impedance cir- cuit. for proper operation, v in and v out should be constrained to the range gnd  (v in or v out )  v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open. i/o pins must be connected to a properly terminated line or bus.
mc74vhc4066 http://onsemi.com 3 dc electrical characteristic digital section (voltages referenced to gnd) ???? ???? ???? symbol ????????? ????????? ????????? ?????????? ?????????? ?????????? ??? ??? ??? ????????? ????????? ??? ??? ??? ???? ????  c ??? ???  85  c ???? ????  125  c ???? ???? ???? ???? ???? v ih ????????? ????????? ????????? ????????? ????????? ? level voltage on/off control inputs ?????????? ?????????? ?????????? ?????????? ?????????? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ??? ??? ??? ??? ??? ???? ???? ???? ???? ????????? ????????? ????????? ????????? ? level voltage on/off control inputs ?????????? ?????????? ?????????? ?????????? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ????????? ????????? ????????? ?????????? ?????????? ?????????? ??? ??? ??? ???? ???? ???? 0.1 ??? ??? ??? 1.0 ???? ???? ???? 1.0 ??? ??? ??? a ???? ???? ???? ????????? ????????? ????????? ?????????? ?????????? ?????????? ??? ??? ??? ???? ???? ???? ??? ??? ??? ???? ???? ???? ??? ??? ??? a dc electrical characteristics analog section (voltages referenced to gnd) ???? ???? ???? ???? symbol ????????? ????????? ????????? ????????? ?????????? ?????????? ?????????? ?????????? ??? ??? ??? ??? ????????? ????????? ??? ??? ??? ??? ???? ???? ????  c ??? ??? ???  85  c ???? ???? ????  125  c ???? ???? ???? ???? ???? ???? ???? ???? r on ????????? ????????? ????????? ????????? ????????? ????????? ????????? ????????? ?????????? ?????????? ?????????? ?????????? ??????????  2.0 ma (figures 2 through 7) ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ?????????? ?????????? ?????????? ?????????? v in = v ih v is = v cc or gnd (endpoints) i s  2.0 ma (figures 2 through 7) ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? r on ????????? ????????? ????????? ????????? ?????????? ?????????? ?????????? ?????????? ? gnd) i s  2.0 ma ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? i off ????????? ????????? ????????? ? channel leakage current, any one channel ?????????? ?????????? ?????????? ??? ??? ??? ???? ???? ???? ??? ??? ??? ???? ???? ???? ??? ??? ??? a ???? ???? ???? ????????? ????????? ????????? ? channel leakage current, any one channel ?????????? ?????????? ?????????? ??? ??? ??? ???? ???? ???? ??? ??? ??? ???? ???? ???? ??? ??? ??? a ?at supply voltage (v cc ) approaching 3 v the analog switch ? on resistance becomes extremely non ? linear. therefore, for low ? voltage operation, it is recommended that these devices only be used to control digital signals.
mc74vhc4066 http://onsemi.com 4 ac electrical characteristics (c l = 50 pf, on/off control inputs: t r = t f = 6 ns) ????? ????? ????? symbol ????????????????? ????????????????? ????????????????? ??? ??? ??? ????????? ????????? ??? ??? ??? ???? ????  c ??? ???  85  c ???? ????  125  c ????? ????? ????? ????? ????? t plh , t phl ????????????????? ????????????????? ????????????????? ????????????????? ????????????????? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ??? ??? ??? ??? ??? ????? ????? ????? ????? ????????????????? ????????????????? ????????????????? ????????????????? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ????? ????? ????? ????? ????? ????????????????? ????????????????? ????????????????? ????????????????? ????????????????? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ??? ??? ??? ??? ??? ????? ????? ????? ????? ????????????????? ????????????????? ??? ??? ???? ???? ??? ??? ???? ???? ??? ??? ??? ??? ????????????????? ????????????????? ????????????????? ??? ??? ??? ???? ???? ???? ??? ??? ??? ???? ???? ???? typical @ 25 c, v cc = 5.0 v pf 15 * used to determine the no ? load dynamic power consumption: p d = c pd v cc 2 f + i cc v cc .
mc74vhc4066 http://onsemi.com 5 additional application characteristics (voltages referenced to gnd unless noted) ???? ???? ???? symbol ?????????? ?????????? ?????????? ?????????????? ?????????????? ?????????????? ??? ??? ??? ???? ???? ????  c 74hc ??? ??? ??? ???? ???? ???? ???? ???? bw ?????????? ?????????? ?????????? ?????????? ?????????? ? channel bandwidth or minimum frequency response (figure no tag) ?????????????? ?????????????? ?????????????? ?????????????? ?????????????? , c l = 10 pf ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ?????????? ?????????? ?????????? ?????????? ?????????? ? channel feedthrough isolation (figure no tag) ?????????????? ?????????????? ??????????????  sine wave adjust f in voltage to obtain 0 dbm at v is f in = 10 khz, r l = 600 , c l = 50 pf ??? ??? ??? ???? ???? ???? ? 50 ? 50 ? 50 ??? ??? ??? ??? ??? ?????????????? ?????????????? ?????????????? , c l = 10 pf ??? ??? ??? ???? ???? ???? ? 40 ? 40 ? 40 ???? ???? ???? ???? ???? ???? ?????????? ?????????? ?????????? ?????????? ?????????? ?????????? ?????????????? ?????????????? ?????????????? ??????????????  1 mhz square wave (t r = t f = 6 ns) adjust r l at setup so that i s = 0 a r l = 600 , c l = 50 pf ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ?????????????? ?????????????? ?????????????? , c l = 10 pf ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ?????????? ?????????? ?????????? ?????????? ?????????? ?????????? ?????????????? ?????????????? ??????????????  sine wave adjust f in voltage to obtain 0 dbm at v is f in = 10 khz, r l = 600 , c l = 50 pf ??? ??? ??? ???? ???? ???? ??? ??? ??? ??? ??? ??? ?????????????? ?????????????? ?????????????? ?????????????? , c l = 10 pf ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ?????????? ?????????? ?????????? ?????????? ?????????????? ?????????????? ?????????????? ?????????????? , c l = 50 pf thd = thd measured ? thd source v is = 4.0 v pp sine wave v is = 8.0 v pp sine wave v is = 11.0 v pp sine wave ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? figure 2. typical on resistance, v cc = 2.0 v 0 50 100 150 200 250 300 350 400 0.00 0.20 0.40 0.60 0.80 1.00 1.20 1.40 1.60 1.80 2.00 +25  c +125  c ? 55  c v is , input voltage (volts), referenced to ground ron @ 2 v
mc74vhc4066 http://onsemi.com 6 0 20 40 60 80 100 120 140 160 180 200 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 v is , input voltage (volts), referenced to ground ron @ 4.5 v +25  c +125  c ? 55  c figure 3. typical on resistance, v cc = 4.5 v figure 4. typical on resistance, v cc = 6.0 v 0 10 20 30 40 50 60 70 80 90 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 5.50 6.00 +25  c +125  c ? 55  c v is , input voltage (volts), referenced to ground ron @ 6 v
mc74vhc4066 http://onsemi.com 7 figure 5. typical on resistance, v cc = 9.0 v v is , input voltage (volts), referenced to ground ron @ 9v 0 10 20 30 40 50 60 70 80 90 0.00 1.00 2.00 3.00 4.00 5.00 6.00 7.00 8.00 9.00 +25  c +125  c ? 55  c figure 6. typical on resistance, v cc = 12 v 0 10 20 30 40 50 60 0.00 1.00 2.00 3.00 4.00 5.00 6.00 7.00 8.00 9.00 10.00 11.00 12.00 v is , input voltage (volts), referenced to ground ron @ 12 v +25  c +125  c ? 55  c
mc74vhc4066 http://onsemi.com 8 figure 7. on resistance test set ? up plotter mini computer programmable power supply dc analyzer v cc + - analog in common out gnd device under test figure 8. maximum off channel leakage current, any one channel, test set ? up off 7 14 v cc a v cc gnd v cc selected control input v il figure 9. maximum on channel leakage current, test set ? up on 14 v cc n/c a gnd v cc 7 selected control input v ih figure 10. maximum on ? channel bandwidth test set ? up on 14 v cc 0.1 f c l * f in db meter *includes all probe and jig capacitance. v os 7 selected control input v cc figure 11. off ? channel feedthrough isolation, test set ? up off 7 14 v cc 0.1 f c l * f in db meter *includes all probe and jig capacitance. v os r l v is selected control input figure 12. feedthrough noise, on/off control to analog out, test set ? up 14 v cc c l * *includes all probe and jig capacitance. off/on v cc gnd v in 1 mhz t r = t f = 6 ns control v cc/2 r l i s r l v os 7 selected control input v cc/2
mc74vhc4066 http://onsemi.com 9 positionwhen testing t plz and t pzl figure 13. propagation delay test set ? up on 14 v cc *includes all probe and jig capacitance. test point analog out analog in c l * 7 selected control input v cc t r t f v cc gnd high impedance v ol v oh high impedance control analog out 90% 50% 10% 50% 50% 10% 90% t pzh t phz t pzl t plz figure 14. propagation delay, on/off control to analog out on/off v cc test point 14 v cc 1 k positionwhen testing t phz and t pzh c l * 1 2 1 2 figure 15. propagation delay test set ? up 1 2 7 selected control input figure 16. crosstalk between any two switches, test set ? up r l on 14 v cc or gnd c l * *includes all probe and jig capacitance. off r l r l v is r l c l * v os f in 0.1 f v cc/2 v cc/2 7 selected control input v cc/2 figure 17. power dissipation capacitance test set ? up 14 v cc n/c off/on a n/c 7 selected control input on/off control *includes all probe and jig capacitance. v cc v cc gnd analog in analog out 50% t plh t phl 50% figure 18. propagation delays, analog in to analog out
mc74vhc4066 http://onsemi.com 10 0 -10 -20 -30 -40 -50 1.0 2.0 frequency (khz) dbm -60 -70 -80 -90 fundamental frequency device source figure 19. plot, harmonic distortion 3.0 on v cc 0.1 f c l * f in r l to distortion meter *includes all probe and jig capacitance. v os v is 7 selected control input v cc figure 20. total harmonic distortion, test set ? up v cc/2 application information the on/off control pins should be at v cc or gnd logic levels, v cc being recognized as logic high and gnd being recognized as a logic low. unused analog inputs/outputs may be left floating (not connected). however, it is advisable to tie unused analog inputs and outputs to v cc or gnd through a low value resistor. this minimizes crosstalk and feedthrough noise that may be picked ? up by the unused i/o pins. the maximum analog voltage swings are determined by the supply voltages v cc and gnd. the positive peak analog voltage should not exceed v cc . similarly, the negative peak analog voltage should not go below gnd. in the example below, the difference between v cc and gnd is twelve volts. therefore, using the configuration in figure 21, a maximum analog signal of twelve volts peak ? to ? peak can be controlled. when voltage transients above v cc and/or below gnd are anticipated on the analog channels, external diodes (dx) are recommended as shown in figure 22. these diodes should be small signal, fast turn ? on types able to absorb the maximum anticipated current surges during clipping. an alternate method would be to replace the dx diodes with mosorbs (high current surge protectors). mosorbs are fast turn ? on devices ideally suited for precise dc protection with no inherent wear out mechanism. analog o/i on 14 v cc = 12 v analog i/o + 12 v 0 v + 12 v 0 v other control inputs (v cc or gnd) on 16 v cc d x d x v cc d x figure 21. 12 v application figure 22. transient suppressor application 7 selected control input d x other control inputs (v cc or gnd) 7 selected control input v cc
mc74vhc4066 http://onsemi.com 11 +5 v 14 vhc4066 control inputs 7 5 6 14 15 lsttl/ nmos analog signals r* r* r* r* analog signals vhct buffer r* = 2 to 10 k v dd = 5 v v cc = 5 to 12 v analog signals analog signals 116 14 control inputs 7 8 mc14504 13 3 5 7 9 11 14 2 4 6 10 5 6 14 15 channel 4 channel 3 channel 2 channel 1 1 of 4 switches common i/o 1234 control inputs input output 0.01 f lf356 or equivalent a. using pull-up resistors b. using hct buffer figure 23. lsttl/nmos to hcmos interface figure 24. ttl/nmos ? to ? cmos level converter analog signal peak ? to ? peak greater than 5 v (also see vhc4316) figure 25. 4 ? input multiplexer figure 26. sample/hold amplifier + - 1 of 4 switches +5 v 14 control inputs 7 5 6 14 15 lsttl/ nmos analog signals analog signals 1 of 4 switches 1 of 4 switches 1 of 4 switches vhc4066 vhc4066
mc74vhc4066 http://onsemi.com 12 package dimensions soic ? 14 case 751a ? 03 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. ? a ? ? b ? g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t ? t ? f r x 45 seating plane d 14 pl k c j m  dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019  7.04 14x 0.58 14x 1.52 1.27 dimensions: millimeters 1 pitch soldering footprint* 7x *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc74vhc4066 http://onsemi.com 13 package dimensions tssop ? 14 dt suffix case 948g ? 01 issue b dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ? w ? .  s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l ? u ? seating plane 0.10 (0.004) ? t ? ??? ??? section n ? n detail e j j1 k k1 ? w ? 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t ? v ? 14x ref k n n 7.06 14x 0.36 14x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc74vhc4066 http://onsemi.com 14 package dimensions soeiaj ? 14 case 965 ? 01 issue b h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.10 0.20 0.004 0.008 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 1.42 --- 0.056 a 1 h e q 1 l e  10  0  10  l e q 1  notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). 0.13 (0.005) m 0.10 (0.004) d z e 1 14 8 7 e a b view p c l detail p m a b c d e e l m z on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. mc74vhc4066/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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